1. Field of the Invention
The present invention relates to a general-purpose image processor adapted for use in an image data filtering process or the like.
2. Description of the Related Art
It is customary that an image processor is designed for exclusive use so as to be suited for a special processing purpose. Regarding the parallel processor for dealing with two-dimensional image, there are known some conventional examples as disclosed in Japanese Patent Laid-open No. Sho 62 (1987)-208158.
The technology described in the above is concerned with a contrivance where image processing algorithms are formed into individual circuits according to the respective functions and are integrated to constitute a single LSI, so that any specific algorithm for calculation of a product sum or the like can be executed fast by inputting parameters.
As for the processor operated under microprogram control, there are also known some conventional examples as disclosed in Japanese Patent Laid-open No. Sho 63 (1988)-118885. The technology described in the above is so contrived that four local processor units are incorporated in a single LSI in such a manner that each processor unit serves as a multiprocessor on the basis of a microprogram.
Since any of such conventional image processors is designed for a predetermined purpose alone, a fast operation can be performed in executing a specific algorithm, but execution of any other algorithm is impossible. And even by combining a plurality of processors mutually, the multiprocessor constitution is adapted merely for a specific algorithm alone due to the disadvantage that data communication is not realizable between the processors.
Because of such lack of the general usability, it is impossible to attain extension of the processor from a product sum calculation of, e.g., (3.times.3) size to that of a (5.times.5) or greater size, or to achieve a higher operation speed by employing a plurality of processors for split processing.
If data communication is rendered possible between processors, it follows that mutual processes of the data in, e.g., two image memories can be executed to consequently simplify the operation of calculating the logical sum or OR of the two image data. Furthermore it becomes possible, by utilizing the address function of a register file, to realize application to an address control circuit and so forth for an image memory.